发明名称 DATA OUTPUT CIRCUIT AND SEMICONDUCTOR STORAGE
摘要 PROBLEM TO BE SOLVED: To accelerate data output and to reduce noise by outputting output data held in a latch circuit with an output pin and outputting middle potential with the output pin only when the output data are changed. SOLUTION: When data of '1' is outputted from a sense amplifier circuit 25, the output data '1' from the sense amplifier circuit 25 and the data '1' beforehand held in a latch circuit 53 are inputted to an XNOR circuit 60, and the output of the XNOR circuit 60 becomes '1', and a switch 65 is turned on. When the data '1' of the sense amplifier circuit 25 and the latch circuit 53 are inputted to an XOR circuit 61, the output of the XOR circuit 61 becomes '0', and the switches 64, 65 are turned on, and the middle potential is outputted to an output pin 27 by resistors 62, 63. The output becomes the middle potential while the data output is delayed, and the time of the output data '1' and '0' are reduced. Further, the output potential difference is reduced to about half, and sizes of output buffers 55, 56 are reduced.
申请公布号 JP2000040374(A) 申请公布日期 2000.02.08
申请号 JP19980207450 申请日期 1998.07.23
申请人 TOSHIBA CORP 发明人 TAKAGI YASUHARU
分类号 G11C11/417;G11C11/409;H03K19/0175;(IPC1-7):G11C11/417;H03K19/017 主分类号 G11C11/417
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