发明名称 PHASE LOCKED LOOP CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a phase locked loop circuit that is stable in operation over a wide frequency band. SOLUTION: A phase frequency comparator 12 compares a phase and a frequency of an input signal Si with those of a comparison signal S17 and provides an output of a phase lead signal S12u and a phase lag signal S12d. The phase lead signal S12u or the phase lag signal S12d is given to a charge pump 13, which provides an output of an output signal S13. A loop filter 14 smoothes the output signal S13 and provides an output of a control voltage S14. The control voltage S14 is given to a voltage controlled oscillator 15, which outputs an output signal S15. A frequency divider 17 frequency-divides the output signal S15, which gives a comparison signal S17 to the phase frequency comparator 12. Moreover, a control section 18 converts the control voltage S14 into a control signal S18. When the frequency of the input signal Si is low, the control voltage S14 is low, a current Ip of current sources 13-1, 13-4 is small, and when the frequency is high, the control signal S14 is high and the current Ip is high.
申请公布号 JP2000013220(A) 申请公布日期 2000.01.14
申请号 JP19980174329 申请日期 1998.06.22
申请人 OKI ELECTRIC IND CO LTD 发明人 OSHIMA KOJI
分类号 H03L7/093;(IPC1-7):H03L7/093 主分类号 H03L7/093
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