| 摘要 |
An enhanced contrast semiconductor wafer alignment target for use in automatic, light balanced, null seeking, servocontrolled mask-to-wafer aligners. The target has a line border which differs sharply in its light reflecting characteristic from the surrounding surface of the semiconductor wafer. Within the target area defined by the line border are a plurality of light reflecting and light removing areas arranged, preferably, in alternating sequence to form a checkerboard or parallel line pattern. For semiconductor wafers in which the target cannot be formed in an overlying, electrically insulative layer because of the subsequent removal of the layer, the target is etched directly into the semiconductor materials.
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