| 摘要 |
<p>PROBLEM TO BE SOLVED: To improve the read disturb property of a nonvolatile memory having a micro gate length and realize one transistor cell. SOLUTION: A plurality of memory transistors, having comparatively thickened tunnel insulation films are arranged like a matrix, constituting a memory array, and in the source and/or drain of a nonselective row memory transistors M21 arranged in a row not including a selective memory transistor M11 , a nonselective row vias voltage between source potential and gate potential during reading of selective transistor M11 is applied to the channel formation area in the reverse vias direction for example, and further a voltage between a voltage to be applied during reading of selective memory transistor M11 to the gate and grounding voltage is applied to the source of the selective memory transistor M11 . Then a voltage equivalent to or lower than that to the source of the selective memory transistor M11 is applied to the gate of the non-selective line.</p> |
