发明名称 |
CMOS circuitry with shortened P-channel length on ultrathin silicon on insulator |
摘要 |
An integrated circuit comprising an insulating substrate; a layer of silicon formed on said insulating substrate; a p-channel transistor and an n-channel transistor formed in said silicon layer and interconnected in a CMOS circuit; wherein the ratio of transistor p-channel length to transistor n-channel length in the CMOS circuit is less than or equal to one.
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申请公布号 |
US5973363(A) |
申请公布日期 |
1999.10.26 |
申请号 |
US19950401521 |
申请日期 |
1995.03.09 |
申请人 |
PEREGRINE SEMICONDUCTOR CORP. |
发明人 |
STAAB, DAVID R.;GREENE, RICHARD M.;BURGENER, MARK L.;REEDY, RONALD E. |
分类号 |
H01L21/02;H01L21/20;H01L21/336;H01L21/762;H01L21/86;H01L27/11;H01L27/12;H01L29/786;H04Q9/00;(IPC1-7):H01L29/94 |
主分类号 |
H01L21/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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