| 摘要 |
In a computer system, an architecture for optimizing aspects of data movement operations by performing functions such as memory allocation and notification on hardware rather than software. The invention thereby optimizes several higher-level processor operations that involve data movement, including internodal messaging, data copying, and data zeroing. Method and apparatus is also disclosed for detecting and responding to translation lookaside buffer (TLB) purges indicating a change in physical memory mapping during translation of virtual memory to physical memory.
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