发明名称 Cache coherency protocol having hovering (H) and recent (R) states
摘要 <p>A cache and method of maintaining cache coherency in a data processing system are described. The data processing system includes a plurality of processors and a plurality of caches coupled to an interconnect. According to the method, a first data item is stored in a first of the caches in association with an address tag indicating an address of the first data item. A coherency indicator in the first cache is set to a first state that indicates that the tag is valid and that the first data item is invalid. Thereafter, the interconnect is snooped to detect a data transfer initiated by another of the plurality of caches, where the data transfer is associated with the address indicated by the address tag and contains a valid second data item. In response to detection of such a data transfer while the coherency indicator is set to the first state, the first data item is replaced by storing the second data item in the first cache in association with the address tag. In addition, the coherency indicator is updated to a second state indicating that the second data item is valid and that the first cache can supply said second data item in response to a request. &lt;IMAGE&gt;</p>
申请公布号 EP0936558(A2) 申请公布日期 1999.08.18
申请号 EP19990301068 申请日期 1999.02.15
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 ARIMILLI, RAVI KUMAR;DODSON, JOHN STEVEN;LEWIS, JERRY DON
分类号 G06F12/08;(IPC1-7):G06F12/08 主分类号 G06F12/08
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