Voltage controlled oscillator having a controllable duty cycle

摘要

The voltage controlled oscillator comprising a ring oscillator generates an oscillating signal of which the duty cycle is almost 50% in spite of providing a high frequency signal. Each of the delay inverting circuits in the ring oscillator increases the output signal from the "L" level to the "H" level over the constant delay time tr when the input signal transitions from the "H" level to the "L" level. It also decreases the output signal from the "H" level to the "L" level over the variable delay time tf in response to the delay control voltage Vc when the input signal transitions from the "L" level to the "H" level. The output signal from the ring oscillator comprising the delay inverting circuits is applied to another delay inverting circuit. The other delay inverting circuit responds over at the constant delay time tr when the input signal transitions from the "H" level to the "L" level, and responds over at the delay time tf/2 in accordance with the delay control voltage Vc when the input signal transitions from the "L" level to the "H" level. As a result, the other delay inverting circuit generates an oscillating signal having a duty cycle that almost 50%.