发明名称 SR FLIP FLOP
摘要 <p>A SR flip-flop using a device which has negative resistance between two output electrodes provided on one of two semiconductor regions in a fixed reversible reverse breakdown condition of the semiconductor junction formed between the two semiconductor regions. The SR motion is controlled by applying trigger pulses directly to two output electrodes. In this way, the circuit is simplified and the operation speed is raised. &lt;IMAGE&gt;</p>
申请公布号 EP0935343(A1) 申请公布日期 1999.08.11
申请号 EP19980929782 申请日期 1998.07.01
申请人 MASUDA, TATSUJI 发明人 MASUDA, TATSUJI
分类号 H01L29/86;H03K3/313;H01L21/82;H01L27/04;H03K3/037;(IPC1-7):H03K3/313 主分类号 H01L29/86
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