发明名称 Patternless technique for building self-aligned floating gates
摘要 A patternless, self-aligning method of forming a floating gate on a silicon wafer having a plurality of raised field oxide isolation structures. The method of the present invention includes depositing a polysilicon layer onto the silicon wafer and the raised field oxide isolation structures, depositing a polysilicon etch masking layer onto the polysilicon layer, and planarizing the polysilicon etch masking layer. The polysilicon etch masking layer is then etched to expose the polysilicon layer over the raised field oxide isolation structures. The exposed polysilicon layer is then etched to remove the polysilicon layer over the raised field oxide isolation structures. The remaining polysilicon etch masking layer is then removed, leaving a plurality of polysilicon regions covering the silicon wafer between the field oxide isolation structures.
申请公布号 US5922619(A) 申请公布日期 1999.07.13
申请号 US19970942503 申请日期 1997.10.02
申请人 TEXAS INSTRUMENTS INCORPORATED 发明人 LARKIN, DAVID L.
分类号 H01L21/336;(IPC1-7):H01L20/21 主分类号 H01L21/336
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