发明名称 HIGH INTEGRITY BORDERLESS VIAS WITH HSQ GAP FILLED PATTERNED CONDUCTIVE LAYERS
摘要 <p>Borderless vias (55) are formed in electrical connection with a lower metal feature of a metal pattern gap filled with HSQ (52). Heat treatment in an inert atmosphere is conducted before filling the through-hole to outgas water absorbed during solvent cleaning of the through-hole, thereby reducing via void formation and improving via integrity.</p>
申请公布号 WO1999031725(A1) 申请公布日期 1999.06.24
申请号 US1998026951 申请日期 1998.12.18
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