| 摘要 |
<p>In addition to the connection pads provided for normal operation, integrated circuits sometimes also embody additional testing connection pads via which signals can be fed into, or picked up from, the wafer during testing. Said connection pads take up additional space on the semiconductor wafer, with the result that fewer circuits can be accommodated on a semiconductor wafer of a given size. The invention proposes siting the testing connections in a single row in each case on one or two sides of the circuit and connecting them to two adjacent circuits. The cut for separating the chips after production and testing can then run through these testing connections, with the result that said testing connections require only a small amount of additional space. Adjacent circuits advantageously have a mirror-image layout with respect to each other. <IMAGE></p> |
