发明名称 Method of making multi-layer gate structure with different stoichiometry silicide layers
摘要 A method of forming a multi-layer silicide gate structure for a MOS type semiconductor device that includes the processing steps of first providing a substrate, then depositing a gate oxide layer on the substrate, then depositing a first refractory metal silicide layer which has a first stoichometry on the gate oxide layer, and finally depositing a second refractory metal silicide layer which has a second stoichometry different than the first stoichometry on the first deposited refractory metal silicide layer.
申请公布号 US5907784(A) 申请公布日期 1999.05.25
申请号 US19970799833 申请日期 1997.02.13
申请人 CYPRESS SEMICONDUCTOR 发明人 LARSON, WILLIAM L.
分类号 A61K38/12;C07K7/62;H01L21/28;H01L21/3205;H01L21/336;H01L21/768;H01L29/49;(IPC1-7):H01L21/320;H01L21/476 主分类号 A61K38/12
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