| 摘要 |
In an element region, in which a memory cell is constituted, on a silicon substrate, a gate electrode with which each of a plurality of the memory cells is individually constituted is individually disposed for each memory cell. A first and a second inter-layer insulating films are formed right upon the gate electrode. A jumping wiring is disposed on the insulating films. The jumping wiring is directly and electrically connected, within the memory pattern region in which the memory cell is formed, with each individual gate electrodes through the jumping contact.
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