发明名称 NON-VOLATILE SEMICONDUCTOR MEMORY
摘要 <p>PROBLEM TO BE SOLVED: To enable realize data writing operation which never cause erroneous writing and to improve reliability of writing operation. SOLUTION: This device is provided with a memory cell array 1 in which NAND cells in which plural non-volatile memory cells are connected in series are arranged in an array state, a column decoder 3 selecting a bit line of the memory cell array 1, a bit line control circuit 2 performing sense operation and bit line voltage setting operation, and a row decoder 5 selecting a word line of the memory cell array 1, and data rewriting is performed by repeating alternately first operation applying voltage for performing data rewriting for a selection memory cell and second operation examining a data rewriting state of a selection memory cell. A word line of the selection memory cell is held in a floating state only in a fixed period of initial first operation in data rewriting.</p>
申请公布号 JPH1196778(A) 申请公布日期 1999.04.09
申请号 JP19970262377 申请日期 1997.09.26
申请人 TOSHIBA CORP 发明人 NAKAMURA HIROSHI;AKITA KAZUYUKI;SATO TAKESUKE
分类号 G11C16/02;G11C16/04;G11C16/06;(IPC1-7):G11C16/02 主分类号 G11C16/02
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