发明名称 Semiconductor memory device having a memory cell capacitor and a fabrication process thereof
摘要 A method for fabricating a dynamic random access memory comprises the steps of determining a design rule for word lines and bit lines and further for a pattern that extends from a memory cell array region to a peripheral region across a stepped boundary, determining a step height of the stepped boundary based upon the design rule, determining a capacitance of the memory cell capacitor based upon the step height of the stepped boundary, determining a parasitic capacitance of a bit line such that a ratio of the parasitic capacitance to the capacitance of the memory cell is smaller than a predetermined factor, and determining the number of the memory cells that are connected to one bit line based upon the parasitic capacitance of the bit line.
申请公布号 US5874332(A) 申请公布日期 1999.02.23
申请号 US19960683543 申请日期 1996.07.15
申请人 FUJITSU LIMITED 发明人 EMA, TAIJI
分类号 G11C11/404;G11C11/4097;H01L21/8242;H01L27/10;H01L27/108;(IPC1-7):H01L21/824 主分类号 G11C11/404
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