发明名称 |
Struktur zur Rückgewinnung eines Teils eines teilweise funktionsfähigen eingebetteten Speichers |
摘要 |
According to the present invention, one or more addresses are forced to a logic state to define a smaller, fully functional portion of embedded memory. A first preferred embodiment has a first fuse circuit and a second fuse circuit which control the conduction and the output signal of a transmission gate which passes through an address signal. The output signal of both the first and the second fuse circuits are input signals to logic circuitry which produces a first input signal and a second input signal to the transmission gate. When the first fuse is blown, the address signal is forced to a first logic state and when the second fuse is blown, the address signal is forced to a second logic state. When neither the first fuse nor the second fuse is blown, the address signal is simply passed through the transmission gate. A second preferred embodiment of the present invention has a first fuse circuit, a second fuse circuit, and an inverting stage through which an address signal passes. When the first fuse is blown, the address signal is forced to a first logic state and when the second fuse is blown, the address signal is forced to a second logic state. When neither the first fuse nor the second fuse is blown, the address signal is inverted. <IMAGE> |
申请公布号 |
DE69414450(D1) |
申请公布日期 |
1998.12.17 |
申请号 |
DE1994614450 |
申请日期 |
1994.04.20 |
申请人 |
STMICROELECTRONICS, INC., CARROLLTON, TEX., US |
发明人 |
MCCLURE, DAVID CHARLES, DENTON COUNTY, TEXAS 75007, US |
分类号 |
G11C11/413;G11C8/06;G11C29/00;G11C29/04;G11C29/44;(IPC1-7):G06F11/20 |
主分类号 |
G11C11/413 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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