发明名称 DIGITAL CODER AND DIGITAL DECODER
摘要 <p>PROBLEM TO BE SOLVED: To make the scale of the circuit required for coding small, to reduce the cost of the coder/decoder and to attain low power consumption drive by allowing a variable length coding section to use tables that provides outputs of code length, frequency of occurrence, a pattern with a highest frequency of occurrence corresponding to the code length. SOLUTION: In a variable length coding section, 8 bits in total being a sum of zero length (nnnn) in 4-bit and group coefficient (ssss) in 4-bit are given to a table 1(22) as addresses. A code length (len) outputted from the table 1(22) is given to a table 2(23) as an address and the table 2(23) stores a pattern (dpat) with a highest frequency of occurrence corresponding to the code length as data. A pattern (dpat) with a highest frequency of occurrence corresponding to the code length (len) is outputted from the table 2(23) and added to the frequency of occurrence having been already outputted from the table 1(22) at an adder 24, from which a Huffman code is obtained.</p>
申请公布号 JPH10322221(A) 申请公布日期 1998.12.04
申请号 JP19970123947 申请日期 1997.05.14
申请人 SHARP CORP 发明人 HORIKAWA TOYOJI;HIGAMI SADAHIKO;KODAMA YASUSHI
分类号 H04N19/60;G11B20/10;H03M7/40;H03M7/46;H04N1/41;H04N19/426;H04N19/625;H04N19/91;(IPC1-7):H03M7/40;H04N7/30 主分类号 H04N19/60
代理机构 代理人
主权项
地址