发明名称 |
Radio receiver performing simultaneous equalisation and error correction decoding |
摘要 |
<p>A signal received by a receiving antenna 504 is input to an UDMV 505 through a detector, and compensation for distortion caused by multipath fading and an error correction using Viterbi decoding are simultaneously performed, obtaining demodulation data 506. The UDMV 505 comprises a demodulator in which an MLSE and a Viterbi decoder are combined. Thereby, equalization for removing a line distortion and reduction in an error rate can be simultaneously performed, improving a receiving quality. <IMAGE></p> |
申请公布号 |
EP0881796(A2) |
申请公布日期 |
1998.12.02 |
申请号 |
EP19980109124 |
申请日期 |
1998.05.19 |
申请人 |
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. |
发明人 |
UESUGI, MITSURU;KATO, OSAMU |
分类号 |
H04B7/005;H04B7/26;H04L1/00;H04L25/03;(IPC1-7):H04L1/00 |
主分类号 |
H04B7/005 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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