发明名称 Non-volatile semiconductor memory with floating gate and control gate and fabrication process therefor
摘要 An oxide layer is formed with covering the surface of floating gates and the surface of a substrate. Control gates are formed on the oxide layer only at the portion aligning to the upper surface and at least a part of the side surface of the floating gate. By this, up to the portion in parallel to the substrate from the side surface portion of the floating gate, the control gate is not extended. Even when an interval between adjacent memory cells is reduced, opening dimension of the contact hole formed between the memory cells can be made greater. Contact resistance can be reduced. Also, the size of the memory cell can be made smaller to permit increasing of package density.
申请公布号 US5841162(A) 申请公布日期 1998.11.24
申请号 US19970822906 申请日期 1997.03.24
申请人 NEC CORPORATION 发明人 ENOMOTO, SHUICHI
分类号 H01L21/336;H01L21/8247;H01L29/423;(IPC1-7):H01L29/788;H01L29/792 主分类号 H01L21/336
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