发明名称 |
Method and system for automated electromigration verification in accordance with fabrication process rules |
摘要 |
An automated method and system for detecting electromigration violations in signal lines of an integrated circuit design to be fabricated is disclosed. The automated method and system checks conductive traces, vias and/or contacts that are used to route signals to and from various functional cells within the integrated circuit design against predetermined process rules to detect electromigration violations. The operation and effectiveness of the automated method and system are far superior to conventional manual approaches.
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申请公布号 |
US5831867(A) |
申请公布日期 |
1998.11.03 |
申请号 |
US19960669627 |
申请日期 |
1996.06.24 |
申请人 |
SUN MICROSYSTEMS, INC. |
发明人 |
AJI, SANDEEP A.;KASINATHAN, MEERA |
分类号 |
G06F17/50;(IPC1-7):G06F17/00 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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