| 摘要 |
PROBLEM TO BE SOLVED: To shorten the lock-up time of a DLL circuit at the application time of a power supply, etc., by outputting a prescribed number of pulse signals according to the phase difference between a comparison reference signal and a comparison object signal. SOLUTION: The latch circuits 425 and 426 of a phase comparison circuit 31 latch the states of flip-flop circuits 421 and 422 consisting of the NAND gates. An activation signal generation circuit 424 generates the activation signals of both circuits 425 and 426, and a delay circuit 423 decides the phase allowance value of an external clock signal ϕext (Ref). Meanwhile, the latch circuits 415 and 416 latch the states of flip-flop circuits 411 and 412. Then a delay circuit 413 decides the phase allowance value of the signal ϕext (Ref), and a delay circuit 414 delays a comparison object signal ϕout (In) by an extent equivalent to four delay components. Then a prescribed number of pulse signals are outputted according to the phase difference between both signals ϕext and ϕout, and a delay control circuit 32 is shifted by plural steps. |
