| 摘要 |
In a sampling frequency conversion apparatus, using outputs of a source oscillator (3; 7) and a fractional frequency divider (4; 8) which divides an output of the source oscillator by a non-integer individually as sampling clocks, an input signal is first sampled by a first sampling circuit (1; 5) and then an output of the first sampling circuit is sampled again by a second sampling circuit (2; 6) to convert the sampling frequency. The fractional frequency divider divides the clock signal of a higher one of the frequencies to produce the clock signal of a lower one of the frequencies, and the dividing ratio of the fractional frequency divider for the production of the clock signal is varied periodically to effect division of a frequency ratio having a fraction when viewed over a long time. <IMAGE> |
