High voltage pump scheme incorporating an overlapping clock

摘要

A system for generating voltages on an integrated circuit utilizes an overlapping clocking scheme. An oscillator (220) generates the overlapping clock signals, which are coupled through oscillator buffers (225), to row pumps (230). In response to the overlapping clock signals, row pumps (230) generate high voltages, typically higher than the VDD voltage of the integrated circuit. These high voltages may be used to program programmable memory cells or interface to logic components of the integrated circuit.