| 摘要 |
PROBLEM TO BE SOLVED: To reduce the power consumption by asymmetrically sampling an analog read signal, adaptively equalizing an obtained discrete time sample value, and detecting digital data from a synchronous sample value extracted through an interpolated timing recovery. SOLUTION: An expected sample value generator B151 calculates a phase error between acquisition by generating an expected sample YTk+τ. When an interpolated RNS sample value D108 is calculated, interpolation intervalτ, B128 used by an interpolator B122 is generated, and the interpolated RNS sample value D108 is re-converted to binary expression Yk+τafter rescaling. The interpolated binary sample value Yk+τ, B102 and an estimated sample value-Yk+τfrom a slicer B141 are inputted to an RNS equalizer filter C103 to be used in an improved least squares algorism.
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