发明名称 |
CLOCK FREQUENCY SWITCHING CIRCUIT |
摘要 |
<p>PROBLEM TO BE SOLVED: To provide a clock frequency switching circuit capable of simplifying circuit wiring. SOLUTION: Each of cells 1 to 3 divides the frequency of a clock inputted based on each of feedback signals F1 to F3 outputted from gate logic 12 into two parts or passes the clock as it is. A switching timing generation counter 6 counts up clocks supplied from the cell 3. The gate logic 12 generates the feedback signals F1 to F3 based on the count value of the counter 6 and supplies these signals F1 to F3 to respective cells 1 to 3.</p> |
申请公布号 |
JPH10198457(A) |
申请公布日期 |
1998.07.31 |
申请号 |
JP19970001935 |
申请日期 |
1997.01.09 |
申请人 |
MIYAGI OKI DENKI KK;OKI ELECTRIC IND CO LTD |
发明人 |
ABE SHINICHI |
分类号 |
G06F1/06;G06F1/08;(IPC1-7):G06F1/08 |
主分类号 |
G06F1/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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