| 摘要 |
A smart card having a counter zone associated with a first reference zone, and a balance zone associated with a second reference zone. The counter zone has at least two levels of counters, each having at least two bits. The counter zone is operable in accordance with the abacus principle. The first reference zone has at least one register with at least two bits and is operable to display the proper erasing of the counters. The second reference zone has at least two fields. Bits of a balance are written simultaneously in the balance zone and in the second reference zone. The balance zone and the second reference zone each include one validation bit making it possible to know if the balance is fully written.
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