| 摘要 |
A semiconductor static random access memory device includes an address decoder unit (34a) and a memory cell array (32) implemented by field effect transistors, a differential amplifier circuit (35a) having a pair of bipolar transistors (QB10/QB11) for increasing a potential difference indicative of a read-out data bit and a level shift circuit (40) operative to change a voltage range of a selecting signal (YA/YS') supplied to a field effect activation transistor (Qn10) coupled between the common emitter node of the bipolar transistors for activating the differential amplifier circuit, and the level shift circuit has a field effect switching transistor (Qn13) and a bipolar transistor (QB14) coupled in series and another field effect switching transistor (Qn14) coupled between the collector node and the base node of the bipolar transistor (QB14) so as to make the source-to-drain voltage of the field effect activation transistor large (Qn10), thereby allowing the field effect activation transistor (Qn10) to stably operate in the saturated range. <IMAGE> |
