发明名称 |
Non-blocking fault-tolerant gamma network for multi-processor system |
摘要 |
A non-blocking fault tolerant gamma network for a multi-processor system is disclosed, including: N dual links respectively connected to n source nodes, and for transmitting data input; a first stage made up with n 2x3 switching devices for outputting data transmitted from the N dual links; a second stage made up with n 3x4 switching devices for outputting data output from the first stage; a third stage to n-1 stage made up with (n-2)xN 4x4 switching devices for receiving data output from the second stage at the third stage and outputting the data to n-1 stage; an n stage made up with n 4x2 circuits for receiving data output from the n-1 stage and outputting the data; and n dual links connected to n destination nodes for transmitting data output from the n stage, whereby the links, which connect the n source nodes, switching devices of the interconnection network and n destination nodes, are designed according to the connection formula of the certain regulation, thus simultaneously set all paths between a plurality of sources and a plurality of destinations, and tolerate a single-switching fault or a single-link fault in the interconnection network.
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申请公布号 |
US5751934(A) |
申请公布日期 |
1998.05.12 |
申请号 |
US19960747685 |
申请日期 |
1996.11.12 |
申请人 |
ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE |
发明人 |
HAN, JONG-SEOK;HAHN, WOO-JONG;YOON, SUK-HAN |
分类号 |
G06F15/16;G06F15/173;H04Q3/68;(IPC1-7):G06F13/00;H04Q11/04 |
主分类号 |
G06F15/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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