| 摘要 |
A potential offset is developed across a self-biased transistor responsive to applied input current. This offset potential has a decrement subtracted therefrom by a network comprising an intermediate transistor and a pair of resistors; this reduced potential provides the base-emitter potential for biasing the base-emitter junction of a transistor supplying output current between its emitter and collector electrodes. Very large current attenuation factors are obtainable with resistors having sufficiently low resistance as to be readily integrable in a monolithic integrated circuit.
|
