发明名称 Signal processor
摘要 In order to establish connections of plural arithmetic units capable of performing basic functions such as filtering in various connection ways, a bus switch is provided which has a plurality of input data lines connected with output terminals of the arithmetic units, at least one external input data line, a plurality of output data lines connected with input terminals of the arithmetic units, and at least one external output data line. In addition, two register sets are provided which hold arithmetic control information designating contents of processes to be performed by the arithmetic units and connection control information designating connection ways within the bus switch. Depending on the broadcasting system, information held by one of the register sets and information held by the other are updated, and, according to a process algorithm, either one of the two register sets is selected. As a result of such arrangement, a single piece of image processing hardware can be shared between different broadcasting systems as well as between different algorithms.
申请公布号 US5740092(A) 申请公布日期 1998.04.14
申请号 US19940299598 申请日期 1994.09.01
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 发明人 MIYAKE, JIRO;NISHIYAMA, TAMOTSU;HASEGAWA, KATSUYA;NINOMIYA, KAZUKI
分类号 G06F9/46;G06F15/78;G06F17/10;G06F17/15;(IPC1-7):G06F7/38;H04N9/64 主分类号 G06F9/46
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