| 摘要 |
PROBLEM TO BE SOLVED: To highly speed up a data reading rate by allowing a precharge circuit to be provided with two conduction type transistors whose gates and drains and sources are respectively connected to a digit selection line, to respective digit lines and to a constant voltage generating circuit and which are brought into conduction in a nonselection. SOLUTION: A plurality of precharge circuits PCAs are provided with clamp circuits CAs consisting of pMOS transistors M6, 7 and gates, drains and sources of the transistors are respectively connected to digit selection lines Y1-Yn, to respective digit lines D1-Dn, D1B-DnB and to the constant voltage VR generated by a constant voltage generating circuit VRG. As a result, after the selection time of a word line WL at the time of a readout, potential differences among digit line pairs, that is, among digit lines D1-Dn, D1B-DnB are made to be rapidly increased to enable the high speed of the reading rate of data from memory cells MCs. |
