| 摘要 |
PROBLEM TO BE SOLVED: To reduce the storage capacitance of an address translation table memory. SOLUTION: In accordance with the output signal of a forward/backward translation selecting terminal 50, a switching circuit 53 supplies a signal/inverted signal from a write memory selecting terminal 37 while switching it to a 1st selector 38/2nd selector 41 and the 2nd selector 41/1st selector 38. In the case of forward translation, the 1st and 2nd selectors 38 and 41 select a translate address from a translate address bus 39 at the time of write and select an input address from an input address bus 42 at the time of read on the other hand. Besides, in the case of backward translation, the input address is selected at the time of write and the translate address is selected at the time of read on the other hand. As a result, one translation table enables forward translation and backward translation and it is enough to store only any one translation table of forward/backward translation in an address translation table memory 35. Thus, the storage capacitance of the address translation table memory 35 is reduced by half in comparison with the conventional case. |
