发明名称 LEAD FRAME FOR SEMICONDUCTOR DEVICE
摘要 <p>PROBLEM TO BE SOLVED: To improve wire bonding property and solder wettability, simplify manufacturing process, make expensive Au plating unnecessary, and improve reliability, by forming an Ag or Ag alloy layer between an Ni or Ni alloy plated layer on lead frame material and a Pd or Pd alloy plated layer as the uppermost layer. SOLUTION: In a lead frame, a first intermediate layer 2, a second intermediate layer 3 and an uppermost layer 4 are formed in order, on the whole surface or a necessary part on lead frame material 1. As the lead frame material 1, pure Cu or Cu alloy and Fe or Fe alloy are used. The second intermediate layer 3 restrains Ni in the first intermediate layer 2 from diffusing into the uppermost layer 4 by heat treatment. The second intermediate layer 3 is formed in order to prevent deterioration of wire bonding property and solder wettability. Ag plating or Ag alloy plating of the second intermediate layer 3 is 0.005-10μm in thickness. Ni or Ni alloy plating of the first intermediate layer 2 is 0.01-10μm in thickness. Pd or Pd alloy plating of the uppermost layer 4 is 0.05-10μm in thickness.</p>
申请公布号 JPH09275182(A) 申请公布日期 1997.10.21
申请号 JP19960104594 申请日期 1996.04.02
申请人 SERIZAWA SEIICHI 发明人 SERIZAWA SEIICHI;IGAWA MASAHIRO
分类号 H01L23/48;H01L23/495;H01L23/50;(IPC1-7):H01L23/50 主分类号 H01L23/48
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