DISPLAY PANEL CONTROL PROCESS AND DISPLAY DEVICE USING SUCH PROCESS

摘要

The present invention relates to a display panel control process comprising cells defined by the intersection of two networks of crossed electrodes, said cells having two status, one inscribed the other one erased. The process comprises the application to all cells of a maintaining signal (Vref) which is crenelated on either side of a medial potential (V0) aimed at producing a maintain discharge at the cells in the inscribed status, at the end of fronts leading to an extreme step (Pb) and applying an addressing signal (Vad) superposed to the maintaining signal (Vref) successively at the electrodes of a network. The addressing signal comprises a semi-selective signal in the erasing mode which generates at the cells connected to the selected electrode an erasing discharge at the end of a front leading to an extreme step of the maintaining signal (Vref) which inhibits the maintaining discharge generated by the maintaining signal (Vref) alone. Application particularly to plasma display panel control.