MEMORY READ METHOD AND MEMORY CONTROLLER

摘要

PROBLEM TO BE SOLVED: To improve the performance of a memory system by reading data respectively stored in the same storage address of plural semiconductor memories in a short time. SOLUTION: A controller 10 is connected to respective flash memories FM 0-FMn through the internal buses FD0-7 of an 8-bit width for instance, the control lines of one each in common to all the flash memories FM0-FMn, that are a command latch enable control line FCLE, an address latch enable control line FALE, a write protect control line XFWP, a write enable control line XEWE and a busy line XFBSY, and the control lines of (n+1) lines each respectively allocated to the respective flash memories FM0-FMn, that are chip enable control lines XFCE0 to XFCEn and read (output) enable control lines XFRE0 to XFREn. The internal buses FD-7 are used also for the transmission of commands, addresses and the data between the controller 10 and the respective flash memories FM0-FMn.