| 摘要 |
PROBLEM TO BE SOLVED: To reduce the polishing amount of CMP(chemical mechanical polishing) in a step for planarizing an interlayer insulation film covering the interconnection, to suppress the global level difference after the planarization step of CMP polishing, and to suppress fluctuation in the process for depositing the interlayer insulation film. SOLUTION: An interconnection 11 is composed of a conductive layer formed by doping metal, e.g. aluminum, or polysilicon with impurities and has overall width W of about 100μm and height (thickness) of about 1μm. A large number of slit-like trenches 12 are made in the interconnection 11 in the longitudinal direction thereof. The trench 12 is about 1μwide, for example, and the interval thereof is also about 1μ. Because of the presence of trenches 12, onle small protrusions are formed at the part of the region on the interconnection 11 where the interconnection is present and the upper region of the trench 12 is substantially planarized. Height of the protrusion is reduced significantly as compared with a conventional one and the polishing amount of CMP can be reduced.
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