发明名称 Parallel calculation of exponent and sticky bit during normalization
摘要 A system implementing a methodology for determining the exponent in parallel with determining the fractional shift during normalization according to partitioning the exponent into partial exponent groups according to the fractional shift data flow, determining all possible partial exponent values for each partial exponent group according to the fractional data flow, and providing the exponent by selectively combining possible partial exponents from each partial exponent group according to the fractional data flow. There is also provided a system implementing a methodology for generating the sticky bit during normalization. Sticky bit information is precalculated and multiplexed according to the fractional dataflow. In an embodiment of the invention, group sticky signals are calculated in tree form, each group sticky having a number of possible sticky bits corresponding to the shift increment amount of the multiplexing. The group sticky bits are further multiplexed according to subsequent shift amounts in the fractional dataflow to provide an output sticky bit at substantially the same time as when the final fractional shift amount is available, and thereby at substantially the same time as the normalized fraction.
申请公布号 US5627774(A) 申请公布日期 1997.05.06
申请号 US19950473308 申请日期 1995.06.07
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 SCHWARZ, ERIC M.;BUNCE, ROBERT M.;SIGAL, LEON J.;NGO, HUNG C.
分类号 G06F5/01;G06F7/57;(IPC1-7):G06F7/00;G06F7/38 主分类号 G06F5/01
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