发明名称 |
CLM/ECL Clock Phase Shifter with CMOS Digital Control |
摘要 |
A CML/ECL clock phase shifter device provides a 360.degree. phase control range and, upon being provided with two CML clock signals related by a known phase difference, the device produces any desired phase in response to a control signal. The device uses a CMOS current switch which generates current signals having the amplitude adjustable with the control signal, which is a digital word. Differential pairs provide amplitude modulated current signals for the input clock and the variant of the input clock. Two MOS transmission networks selectively invert each amplitude modulated signal and sum the signals from each side on a load network. The phase control resolution is optimal over four quadrants for quadrature input clock signals.
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申请公布号 |
CA2184805(A1) |
申请公布日期 |
1997.04.03 |
申请号 |
CA19962184805 |
申请日期 |
1996.09.04 |
申请人 |
NORTHERN TELECOM LIMITED |
发明人 |
GUAY, BERNARD;ALTMANN, MICHAEL |
分类号 |
H01P1/18;H03H11/04;H04L7/033;(IPC1-7):H01P1/18 |
主分类号 |
H01P1/18 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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