| 摘要 |
<p>A computer system is disclosed comprising a clock generator circuit having a clock speed register and circuitry for generating a processor clock signal at a frequency determined by the clock speed register, wherein the processor executes a performance manager program that writes the clock speed register according to a performance state selected by an application program. The application program selects the performance state to maximize performance during processor intensive functions and to maximize power conservation during interactive functions.</p> |
