| 摘要 |
Used nearer to a MOS transistor (25, 29(1), 29(2)) together with another capacitor electrode (39) with a dielectric film (37) interposed for use in a DRAM, a capacitor electrode comprises a conductor pole (53) and a tray-shaped conductor layer (55) which is held by the conductor pole and comprises a plate portion (57) extended perpendicular to a pole axis and having a plate periphery and a peripheral portion (59) extended parallel to the pole axis from the plate periphery towards a pole end. Preferably, the tray-shaped conductor layer is held by the pole on a plurality of levels. A planar conductor layer may additionally be held at the pole end perpendicular to the pole axis. Word (41) and bit (49) lines are embedded in an insulator layer (43, 51) for the capacitor and the transistor. <IMAGE> |
