发明名称 |
Block normalization processor |
摘要 |
<p>A method and apparatus for implementing a vocoder in an application specific integrated circuit (ASIC) is disclosed. The apparatus contains a DSP core (4) that performs computations in accordance with a reduced instruction set (RISC) architecture. The circuit further comprises a specifically designed slave processor to the DSP core (4) referred to as the minimization processor (6). The feature of the invention is a specifically designed block normalization circuitry. <IMAGE></p> |
申请公布号 |
EP0758123(A2) |
申请公布日期 |
1997.02.12 |
申请号 |
EP19960117242 |
申请日期 |
1995.02.13 |
申请人 |
QUALCOMM INCORPORATED |
发明人 |
MCDONOUGH, JOHN G.;CHANG, CHIENCHUNG;SINGH, RANDEEP;SAKAMAKI, CHARLES E.;TSAI, MING-CHANG;KANTAK, PRASHANT |
分类号 |
G10L19/08;G06F5/01;G10L19/00;G10L19/02;G10L19/04;G10L19/06;G10L19/12;G10L19/14;H03M7/30;(IPC1-7):G10L9/14;G10L9/18 |
主分类号 |
G10L19/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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