发明名称 |
All-MOS precision differential delay line with delay a programmable fraction of a master clock period |
摘要 |
A write precompensation circuit includes a plurality of current-controlled delay buffers connected to form a delay line having selectable output taps. The precise delay of each delay buffer is controllable by a secondary control current derived from a master control current such that the precise delay is a precise percent of an oscillator period. The master control current is also used to control the period of a master write clock generated by a current-controlled ring oscillator of delay buffers. A write precompensation method includes steps of controlling current in delay buffers in a current-controlled ring oscillator used to generate a master write clock and current in delay buffers in a current-controlled delay line to maintain delays through delay buffers of the oscillator and the delay line in predetermined proportions to each other.
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申请公布号 |
US5598364(A) |
申请公布日期 |
1997.01.28 |
申请号 |
US19950560002 |
申请日期 |
1995.11.17 |
申请人 |
ANALOG DEVICES, INC. |
发明人 |
MCCALL, KEVIN J.;KOVACS, JANOS;PALMER, WYN |
分类号 |
G11B20/10;G11B20/22;H03K5/135;H03L7/099;(IPC1-7):G11C13/00 |
主分类号 |
G11B20/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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