Logic synthesis method, semiconductor integrated circuit and arithmetic circuit

摘要

A top-down design technique is used to design a semiconductor integrated circuit having a plurality of registers and a plurality of combinational circuits each of which is connected between the registers. When a semiconductor integrated circuit is logic-synthesized from a register transistor level, a front section of a critical path-containing combinational circuit is driven by a high voltage from a high-voltage source while the remaining section and other combinational circuits with no critical path are driven by a low voltage from a low-voltage source. A level shifter is placed at the stage before the critical path-containing combinational circuit. The level shifter converts a low-voltage signal into a high-voltage one. This invention facilitates logic synthesis of a low-power semiconductor circuit without increasing the maximum signal propagation delay of the critical path and without having to provide a level shifter in a combinational circuit. <IMAGE>