发明名称 Schaltungsanordnung zur Überwachung des Programmablaufs eines Mikrorechners
摘要 The watchdog circuit includes two stages (10,11) coupled to an input port (8) and an output port (9). One of the stages is a synchronising circuit (10) and the other a detection stage (11). The detection circuit has a coupling stage (R5,C2,R6) for the output signal (Uw). The synchronising circuit provides an input (Us) of a square wave form. The detector circuit checks the level of the output signal level before the input has changed state. If a fault occurs the computer resets. ADVANTAGE - Provides continuous, simple check on programme operation.
申请公布号 DE4138015(C2) 申请公布日期 1996.11.14
申请号 DE19914138015 申请日期 1991.11.19
申请人 AKO-WERKE GMBH & CO KG, 88239 WANGEN, DE 发明人 NATTERER, HELMUT, 88260 ARGENBUEHL, DE
分类号 G05B19/042;G06F11/00;(IPC1-7):G06F11/30 主分类号 G05B19/042
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