| 摘要 |
A behavioral synthesis method for making integrated circuits with built-in self-test (BIST). Base specifications describing base functionality and BIST specifications describing BIST functionality are developed. The base specifications are described in a hardware description language (HDL) to create a base HDL which is input into a digital computer system. Utilizing both the base specifications and the BIST specifications, a BIST HDL is created on the digital computer system. A netlist is synthesized on the computer system from both the base HDL and the BIST HDL. Thereafter, a digital integrated circuit is produced as specified by the netlist. An advantage of the present invention is the description of BIST circuitry at the HDL level of abstraction instead of at the netlist level. By automatically generating BIST HDL given BIST specifications and base circuit specifications, a circuit designer is relieved of the complications of gate level manipulations to insert a BIST description into a netlist. Compared with the intricacies of low level netlist descriptions, the highest possible abstraction level-synthesizable behavioral HDL-is easy for designers to understand. This highest level HDL is technology independent and easily modifiable.
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