| 摘要 |
<p>PURPOSE: To prevent the discontinuous generation of outputs by executing OR processing between an MSB outputted at the time of executing cumulative addition by a value one-bit larger than the number of final output bits and an input saturation detection bit and switchably outputting lower bits and a set maximum value. CONSTITUTION: An input analog signal and a signal obtained by shifting 90 deg. from the phase of the input analog signal are respectively A/D converted, respective digital signals are multiplied by PN codes respectively through multiplying parts 4, 5, the multiplied values are respectively cumultively added by respective integrating circuits 6, 7 and outputs one bit larger than the number of final output bits are obtained. These outputs become an MSB and lower bits coincident with the number of output bits excluding the MSB through absolute value calculating parts 8, 9 and an addition part 10. Then OR processing between the MSB and the detection output of an output saturation detector 11 is executed and the lower bits coincident with the required number of bits are outputted when the MSB is '0' or a set maximum value is outputted when the MSB is '1' through a switching part 13, so that the generation of discontinuous points can be prevented.</p> |
