| 摘要 |
An apparatus for triggering a plurality of thyristor devices has a clock generator for producing a pulse train output and a digital counter for counting the number of pulses generated by the clock generator. The digital counter has a digital output which is received by a decoder. The decoder has a plurality of output lines, only one of which is in a high logic state at any time depending upon the digital output from the digital counter. A memory unit contains a plurality of digital control data, only one of which is accessed during the duration of the pulse train output. The memory unit has a plurality of memory data lines which are divided into several groups and which are used for reflecting the accessed one of the control data thereon. Each of a plurality of multiplexer units has a plurality of input select lines connected to a respective one of the groups of memory data lines of the memory unit, a plurality of input data lines connected to the output lines of the decoder, and an output terminal to be connected to a thyristor device. The input select lines of the multiplexer units control which one of the input data lines is to be reflected at the respective output terminal of the multiplexer units so as to trigger the respective thyristor device into conduction.
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