| 摘要 |
A D/A converter having a bias circuit that supplies a well-compensated gate voltage to a weighted current source part of the D/A converter, so that any changes in component characteristics due to the manufacturing of the components making up the D/A converter or due to temperature variations in the D/A converter are compensated for to output a correct analog voltage. The bias circuit comprises an amplifier (V1) and a p-type FET (X9), where the drain of the p-type FET is fed back to a non-inverting (NINV) input of the amplifier, and a reference voltage (VREF) is applied to an inverting input (INV) of the amplifier. The bias circuit operates in a negative feedback condition, such that the non-inverting input is kept as close to the reference voltage as possible. A first resistor (R1) is connected to the drain of the p-type FET.
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