发明名称 PULSE REPETITION FREQUENCY MULTIPLIER/DIVIDER
摘要 FIELD: computer engineering. SUBSTANCE: device quantizes input pulse train period, its result is entered in counter, and digital-to-analog converter changes it into voltage which is then sequentially divided and multiplied by k, where k is desired coefficient of input frequency variation, and encoded in analog-to-digital converter. Code obtained is entered in counter operating as subtracter and stored in register wherefrom it is re-entered in counter during its zero filling when zero repetition rate corresponds to input frequency changed k times. EFFECT: improved design.
申请公布号 RU94031724(A) 申请公布日期 1996.06.20
申请号 RU19940031724 申请日期 1994.08.31
申请人 BRAMMER JU.A. 发明人 BRAMMER JU.A.
分类号 H03K23/68 主分类号 H03K23/68
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